Figure 5. An artificial intelligence system based on the developed flexible memristor. (a) A schematic of parallel computation in memristor arrays. (b) Diagram of the trained neural network based on the developed memristor for logic operations of OR and AND. (c) Parallel computation for AND and OR utilizing the developed synapse cells. (d) The letters of "K", "N", "U", "A", and "I" displayed in the parallel connected synapse cells, according to the ASCII code based on the octal numbers. Each letter was confirmed at a 0.2-V reading voltage with 100 ns. (e) A schematic presenting a configuration of the hardware-based neural network for recognizing the handwritten digit images. (f) A schematic diagram showing the crossbar array of the developed flexible memristor for the neural network. (g) Synaptic weight distribution which was calculated in the ideal software system for recognizing the handwritten digits. (h) Conductance distribution of the developed memristor array after the training process for the recognition of the handwritten digits. (i) The pattern recognition accuracy after the learning processes for 50 epochs in the ideal software system and the hardware-based neural network consisting of the developed flexible memristor.