Conclusions
In this study, we optimized n-type and p-type poly-SiOxCSPCs on an ultra-thin thermally grown tunnelling SiOxlayer. We incorporated these into single junction c-Si solar cells which
were eventually used as bottom devices in 4T and 2T tandem devices. Good
passivation quality was achieved for textured n-type
poly-SiOx (iVoc = 710 mV). Using a
two-step annealing process, the passivation quality of the textured
p-type doped poly-SiOx could be improved too
(iVoc = 687 mV). With the developed n-type and p-type
poly-SiOx CSPCs, we fabricated
~4-cm2 wide, screen-printed, a SST
single junction c-Si solar cell with certified efficiency of 20.47% and
FF > 80%. Likewise, a certified efficiency of 19.44% was
obtained for a DST cell endowed poly-SiOx CSPCs. This
DST solar cell architecture is presented here for the first time and
exhibits, without any dual anti-reflective coating, an active area
Jsc = 37.85 mA/cm2. This is in line
with state-of-the-art FBC silicon heterojunction solar cells and other
architectures based on high-thermal budget CSPCs.
We tested our c-Si solar cells in combination with a previously
processed and certified semi-transparent 19.70% perovskite solar cell.
The internally measured efficiencies of the 4T perovskite/c-Si tandem
devices featuring SST and DST poly-SiOx passivated c-Si
bottom devices are 27.97% and 28.07%, respectively.
Based on the improved passivation quality of the textured p-type
poly-SiOx, we fabricated SST solar cell with flat n-type
poly-SiOx at the front side and textured p-type
poly-SiOx at the rear side with an efficiency of
16.79%. Integrating such a poly-SiOx solar cell as
bottom device with a p-i-n perovskite solar cell on top, resulted in a
2T tandem device with an efficiency of 23.18%.