Figure 3: Implied Voc of symmetric (a) p-type doped poly-SiOx on DSP wafer, (b) n-type doped poly-SiOx on DST wafer, and (c) p-type doped poly-SiOx on DST wafer for different thermal oxidation time (thermal oxidation temperature is fixed at 675 °C) and three annealing times (annealing temperature is fixed at 950 °C). These three diagrams share the same legend. (d) Implied Voc of symmetric p-type doped poly-SiOx on DST wafer with two step annealing. In this case, the thermal oxidation temperature and time are fixed at 675 °C for 3 minutes. Here the first step annealing temperature and time have been varied. For each first step annealing condition, a second step annealing time of 5, 10 and 15 minutes is considered, again at fixed annealing temperature (950 °C). Figure 3: Implied Voc of symmetric (a) p-type doped poly-SiOx on DSP wafer, (b) n-type doped poly-SiOx on DST wafer, and (c) p-type doped poly-SiOx on DST wafer for different thermal oxidation time (thermal oxidation temperature is fixed at 675 °C) and three annealing times (annealing temperature is fixed at 950 °C). These three diagrams share the same legend. (d) Implied Voc of symmetric p-type doped poly-SiOx on DST wafer with two step annealing. In this case, the thermal oxidation temperature and time are fixed at 675 °C for 3 minutes. Here the first step annealing temperature and time have been varied. For each first step annealing condition, a second step annealing time of 5, 10 and 15 minutes is considered, again at fixed annealing temperature (950 °C).