(h)
Fig. 7. Simulated and Measured response of the BM (a-b) for the input P1, (c-d) for the input P2, (e-f) for the input P3, (g-h) for the input P4.
Fig. 8 shows the differences in results between simulated and measured of the phase differences at BM centre frequency of 3.5 GHz. According to the simulated, the phase differences for output at P1 −45owas (S15, S16, S17, S18) −46o, −43.3o, −41.5o. Correspondingly, the measured phase differences were (S15, S16, S17, S18) −47.2⁰, 49.4⁰, 51.1⁰, respectively. So, the errors between output ports were 1⁰, 1.7⁰, 3.5⁰ and 2.2⁰, 4.4⁰, 6.1⁰, which introduced the average errors of 2.0⁰ and 4.2⁰, as shown in Fig. 8 (a-b). However, the quartered phase is as mentioned in Table 4. The phase differences when P2 excited by 135⁰ were indicated by the simulated as in 132⁰ between (S26−S25), 129⁰ between ports (S27 – S26), and 139o between ports (S28 – S27), respectively. Thus, the errors between the output ports 3⁰, 6⁰, and 4⁰ introduced the average errors of 4.3⁰, respectively. The measured phase differences indicated 128⁰ between ports (S26 − S25), 142⁰ between ports (S27 – S26), 140⁰ between ports (S28 – S27) at center frequency, as shown in Fig. 8 (c-d). Hence, the errors were 7⁰,11⁰, and 9⁰, introducing the average errors of 9⁰. The phase difference between simulated and measured results reflected very good agreement, as summarised in Table 4. The output P3 of the BM excited revealed that the adjacent port should be by -135⁰ per design, as summarised in Table 5. In simulated and measured results, it was that found the phase differences between the output results were -133⁰,-138⁰,-141⁰ and -142⁰,-127⁰,-131⁰, at centre frequency of 3.5 GHz, respectively. These values were different from the desired values by 2⁰, 3⁰, 6⁰ and 7⁰, 8⁰, 4⁰, introducing the average errors of 3.67 and 6.33⁰ at operation frequency of 3.5GHz, respectively.
As show in Fig. 8 good performances between simulated and measured results when output P4 excited. Table 4 as summarised the phase difference between adjacent outputs ports should be 45o as per design. For the simulation result, the phase difference was 44 between output P5, P6 (S 45 − S 46), 48⁰ between P7, P6 (S 47 −S 46), 40⁰ between P8, P7 (S 48 – S 47), respectively. So, the errors of the simulated result between outputs 1⁰, 3⁰, and 5 introduced the average errors of 3⁰, respectively. Meanwhile, the measured result of the phase difference was 50⁰ between output P5, P6 (S45 – S46), 39⁰ between P7, P6 (S47 – S46), 52⁰ between P8, P7 (S48 – S47), respectively, at operate frequency of 3.5GHz. So, the errors of the measured results between outputs 5⁰, 6⁰, and 7⁰ introduced the average errors of 6⁰, respectively. There small error in phase difference between simulated and measured results due to the variation for electrical permittivity parameter, as summarised in Table 5.
The comparison of S-parameters between the simulated and measured 4 × 4 Butler matrix is as illustrated in Fig.9. This comparison between simulated and measured has small difference with loss error due by SAM and coaxial cable show in Fig 9. Tables 3 and Table introduce the summarised simulated and measured results of the BM to the phase difference between the ports and S-parameters of the proposed BM design at centre frequency of 3.5GHz, respectively. From Tables 3 and 4, the phase differences between all of the ports as good agreement with the desired value. As for Table 5, it displays the comparison between the proposed design 4 × 4 BW with the previous work.