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FPGA Lab 5
  • Alec Aivazis
Alec Aivazis
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Abstract

Lab 5 instructed us to design a stopwatch using the supplied FPGAs. The circuit needed to be able to increment every tenth of a second and track the number of minutes and hours that had passed. While I was instructed to make a three-state machine that is driven by one button that causes the timer to stop/stop/reset in that order. However, I implemented a two-state system and attached the reset functionality to a second button in order to reflect the design of stopwatches that I had encountered. This lab was very useful in demonstrating the steps that are involved when creating a complete circuit. This included designing state machines as well as importing modules previously defined as external libraries which are extremely common when designing circuits.